The trend toward smaller geometry devices in the fabrication of very large scale or very high speed integrated circuits necessitates the use of shallower junctions. For example, in MOS transistors a reduction in source and drain junction depth by a factor of 8 is required to shrink the gate length by a factor of 2 at a given gate oxide thickness and a given substrate doping level.
In the formation of doped layers, which are utilized to form junctions, a common method utilized is to implant a dose of the dopant material into the substrate and then anneal the substrate to activate the doped layer. Implanting is performed by stripping electrons from molecules of the doping material to form ions and accelerating the ions at the substrate by way of a high energy ion beam. As the ions strike the substrate, atoms of the substrate material are moved out of the crystal lattice, or formation. Generally, it is desirable to disturb the position of enough of the substrate atoms in the region to be doped so that an amorphous layer is formed.
Once the dopant material is implanted in the substrate, the substrate is heated (annealed) to a temperature sufficient to reform the material into a crystalline structure with the ions of the doping material occupying the crystal lattice at regular intervals. Each ion of the doping material which is properly positioned in the crystal lattice is referred to as activated. When all of the atoms of the original substrate material are reformed into a crystal lattice and all, or substantially all, of the ions of the doping material are properly positioned in the lattice the doped layer is completely activated. Generally, the amount of activation depends upon the temperature utilized in the annealing process and the length of time the substrate is annealed. The amount of activation is measured by measuring the sheet resistivity of the implanted layer; maximum or nearly maximum activation is signaled by a decrease and then leveling of resistivity as a function of annealing temperature or annealing time at a given temperature. If the doped layer in the substrate is not rendered completely amorphous by the ion implantation, that is some of the atoms of the substrate are still in a partial crystal lattice, the lattice must be broken down and reformed during the annealing process and, in such case, higher temperatures are required for adequate activation. However, because of the smaller geometry devices and the need to reduce processing costs, it is desirable to reduce the annealing temperatures as much as possible.